1,007 research outputs found
GPGPU Reliability Analysis: From Applications to Large Scale Systems
Over the past decade, GPUs have become an integral part of mainstream high-performance computing (HPC) facilities. Since applications running on HPC systems are usually long-running, any error or failure could result in significant loss in scientific productivity and system resources. Even worse, since HPC systems face severe resilience challenges as progressing towards exascale computing, it is imperative to develop a better understanding of the reliability of GPUs. This dissertation fills this gap by providing an understanding of the effects of soft errors on the entire system and on specific applications. To understand system-level reliability, a large-scale study on GPU soft errors in the field is conducted. The occurrences of GPU soft errors are linked to several temporal and spatial features, such as specific workloads, node location, temperature, and power consumption. Further, machine learning models are proposed to predict error occurrences on GPU nodes so as to proactively and dynamically turning on/off the costly error protection mechanisms based on prediction results. To understand the effects of soft errors at the application level, an effective fault-injection framework is designed aiming to understand the reliability and resilience characteristics of GPGPU applications. This framework is effective in terms of reducing the tremendous number of fault injection locations to a manageable size while still preserving remarkable accuracy. This framework is validated with both single-bit and multi-bit fault models for various GPGPU benchmarks. Lastly, taking advantage of the proposed fault-injection framework, this dissertation develops a hierarchical approach to understanding the error resilience characteristics of GPGPU applications at kernel, CTA, and warp levels. In addition, given that some corrupted application outputs due to soft errors may be acceptable, we present a use case to show how to enable low-overhead yet reliable GPU computing for GPGPU applications
The Establishment and Decision-Making about Recycling Model of Waste Electronic Products under Government's Incentive
This paper studied the decision making problem of the closed-loop supply chain with recycling a remanufacturing based on the constraint of government.Considering the effort of the recycling part, an incentive function was designed among the government, manufacturers, and the third party; then a multi-echelon closed-loop supply chain model with remanufacturing based on the third party and manufacture recycling was established. The result suggests that the government's incentive has a positive effect on the behavior of recycling waste products, the greater the units incentive factors of the government, the higher the recycling rate, and it can be more able to motivate the manufacturer and the third party's recycling behavior
MVMR-FS : Non-parametric feature selection algorithm based on Maximum inter-class Variation and Minimum Redundancy
How to accurately measure the relevance and redundancy of features is an
age-old challenge in the field of feature selection. However, existing
filter-based feature selection methods cannot directly measure redundancy for
continuous data. In addition, most methods rely on manually specifying the
number of features, which may introduce errors in the absence of expert
knowledge. In this paper, we propose a non-parametric feature selection
algorithm based on maximum inter-class variation and minimum redundancy,
abbreviated as MVMR-FS. We first introduce supervised and unsupervised kernel
density estimation on the features to capture their similarities and
differences in inter-class and overall distributions. Subsequently, we present
the criteria for maximum inter-class variation and minimum redundancy (MVMR),
wherein the inter-class probability distributions are employed to reflect
feature relevance and the distances between overall probability distributions
are used to quantify redundancy. Finally, we employ an AGA to search for the
feature subset that minimizes the MVMR. Compared with ten state-of-the-art
methods, MVMR-FS achieves the highest average accuracy and improves the
accuracy by 5% to 11%
Simulation and Detection of Photonic Chern Insulators in One-Dimensional Circuit Quantum Electrodynamics Lattice
We introduce a simple method to realize and detect photonic topological Chern
insulators with one-dimensional circiut quantum electrodynamics arrays. By
periodically modulating the couplings of the array, we show that this
one-dimensional model can be mapped into a two-dimensional Chern insulator
model. In addition to allowing the study of photonic Chern insulators, this
approach also provides a natural platform to realise experimentally Laughlin's
pumping argument. Based on scattering theory of topological insulators and
input-output formalism, we show that the photonic edge state can be probed
directly and the topological invariant can be detected from the winding number
of the reflection coefficient phase.Comment: 5 pages, 3 figure
A tree index framework for databases
The search tree index framework, a sub-framework of the Know-It-All Project, is used to develop a generalized search tree that provides the basis for common tree access methods used in database systems. The search tree index framework covers one-dimensional tree structures, point access structures, and special multi-dimensional structures. It also covers sequential queries, exact match queries, range queries, approximate queries, and similarity queries. It applies the Standard Template Library modularity concept in the analysis, architecture, design and interface and takes advantage of reuse capabilities in modern programming languages such as generic programming and design pattern. By using modularization design, the system is designed as an integrated set of layers including algorithms layer, proxy layer and physical storage layer. Layering design technique provides a mechanism to decompose functionality. The design separates index, data, and data Reference/Page reference; uses iterators perform general queries on search tree structures, while providing a clean interface for these queries to define both positions within indexes or files, as well as to refer to a collection of information. The framework can be adapted to the needs of any application by simply changing some of the building blocks and is designed for maximum flexibility and the simplest extension
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